Digital Logic Design Project

The end of the semester is closing in, and the final projects have been assigned.

Here’s the one I drew:

Design a sequential circuit which adds six to a binary number in the range 0000 through 1001. The input and output should be serial with the least significant bit first. Find a state table with a minimum number of states. Design the circuit using NAND gates, NOR gates, and three D flip-flops. Any solution which is minimal for your state assignment and uses 10 or fewer gates and inverters is acceptable. (Assign 000 to the reset state.)

Test Procedure: First, check out your state table by starting in each state and making sure that the present output and next state are correct for each input. Then, starting in the reset state, determine the output sequence for each of the ten possible input sequences and make a table.

At first glance, it doesn’t sounds too complicated. Though, as with the first design project, I’m sure there are a ton of ways to get it working and minimize gate counts.

First order of business: Make a Truth Table!
I have omitted the “Don’t Cares” from this table, since my input range is restricted to inputs 0-9.

truth.table.16.4

Next, we need a State Diagram. We’ve spent very little time on these, so admittedly, I expect this part to be a bit more messy.

Leave a Reply

Your email address will not be published. Required fields are marked *

This site uses Akismet to reduce spam. Learn how your comment data is processed.